In a P-type MOS (Metal Oxide Semiconductor) transistor which is one example of a semiconductor element, a P-type well is formed in an upper portion of a P-type silicon (Si) substrate, and source/drain regions, a gate insulating film and a gate electrode are formed within the P-type well. In addition, there is known a triple well structure in which the periphery of a P-type well where an N-type MOS transistor is formed is surrounded with N-type wells in a P-type silicon substrate.    [Patent document 1] Japanese Laid-open Patent Publication No. 11-297853